Abstract
Nanomagnetic logic (NML) is a promising candidate for the real implementation of quantum-dot cellular automata circuits and can be a proper alternative or complement to CMOS circuits. Like any other nanoscale technologies, NML circuits are also subject to fabrication variations. These variations along with fluctuations caused by thermal noise can affect the performance of these circuits. Therefore, design of NML circuits with high testability is an absolute necessity. Circuits based on conservative logic are inherently testable because of their specific properties. In this paper, considering the physical and geometrical properties of nanomagnets, a nanomagnetic conservative quantum-dot cellular automata gate is designed and evaluated. This circuit can be used as the basic block for the realization of more complex conservative NML circuits. To implement this circuit, the design of the clocked nanomagnetic majority gate is also provided. The OOMMF physical simulation tool is used for simulation and evaluation. The results show the correct functionality of the proposed conservative gate at room temperature. It operates about 34% faster than the NML Fredkin gate. Moreover, the NML version of the conventional Fredkin gate takes 90% more area than the proposed design.
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1 Introduction
Increasing the number of transistors in integrated circuits has increased the leakage power consumption of circuits and limited the use of conventional CMOS circuits [1]. One of the promising technologies to meet this challenge is the use of NML. In fact, this spin-based logic is the physical realization of the QCA at room temperature and utilizes bistable single-domain nanomagnets to store, process, and propagate data [2]. Due to the magnetic nature of NML circuits, static power consumption is almost zero [3]. Calculations have shown that if the 1010 magnets change 108 times per second, their power losses will be about 0.1 watts [4]. Logic and memory can also be integrated into a single chip [5], increasing the data transfer speed between the memory unit and the processor circuit, and reducing the space required for such circuits. In addition, due to the high stability of the nanomagnets against radiation and heat, these circuits are the proper choice for use in harsh environments [6]. These advantages can make NML circuits an alternative or complementary to the conventional CMOS circuits.
Like other nanoscale circuits, NML circuits are subject to various defects. The most important defects arise from fabrication variations. Irregular distances between nanomagnetic cells, missing cells, and merging of nanomagnets are the dominant defects [7]. Each of these fabrication variations affects the energy of the nanomagnets and their switching behavior, and consequently can affect the functionality of the nanomagnetic circuits [8]. Thermal fluctuation is another factor affecting the switching of nanomagnets [9]. Therefore, it is crucial to have testable NML circuits.
In this paper, we utilize the conservative logic concept [10] to design testable nanomagnetic circuits. In conservative logic, the number of 1 s in the output vector is considered to be equal to the number of 1 s in the input vector. Therefore, using only two test vectors, all of which are zero and one, can detect all unidirectional stuck-at faults.
Due to the differences in the way that data are processed and propagated in the conventional CMOS and the nanomagnetic logic circuits, little work has been done in the latter technology [11, 12]. In this paper, we first design and evaluate a clocked nanomagnetic logic three-input majority gate as the fundamental gate of the other nanomagnetic logic circuits, and then design the nanomagnetic conservative quantum-dot cellular automata (NCQCA) circuit using this gate. We also carefully examine the material of nanomagnets, their shape, intrinsic properties, dimensions, and inter-cell distance.
The rest of this paper is organized as follows. In Sect. 2, the background of NML, its fundamental gates, and clocking system is provided. The conservative logic is also explained in this section. The proposed clocking system, clocked majority gate, and NCQCA circuit are presented in Sect. 3. Simulation results, based on OOMMF simulator, are presented in Sect. 4 and then conclusion appears in Sect. 5.
2 Background
2.1 NML basics
In NML circuits, logical values are represented using elongated single-domain nanomagnets. Figure 1 shows the hysteresis curve of such nanomagnet. As can be seen, in the magnetic saturation conditions there are only two situations that can be used to represent 0 and 1 logic values. On the other hand, by removing the external field (H), the nanomagnet maintains its magnetic state along its longest axis, which called the easy axis. In fact, the magnetic material has the least anisotropy energy in this axis [13]. These features of elongated single-domain nanomagnets make them a suitable choice for designing logical circuits with nearly zero static power consumption. NML circuits are made from these nanomagnets side by side. In these circuits, data propagation and computation are performed by magnetic interactions between adjacent nanomagnets.
2.2 NML logic gates
Like QCA, the fundamental devices of NML circuits are inverter, wire and majority gate. In Fig. 2, a nanomagnetic inverter is shown. In this figure, the nanomagnets have been put together in an antiferromagnetic (AF) order. In this arrangement, each of the nanomagnets is in a magnetic state opposite to the adjacent nanomagnet. In order to function properly, all nanomagnets are first nulled by an external magnetic field. In this case, by changing the logical value of the input nanomagnet, the states of the other nanomagnets are changed antiferromagnetically and the data are propagated from the input nanomagnet to the output one. If the number of nanomagnets is odd, a nanomagnetic wire will be made.
Figure 3 shows a nanomagnetic three input majority gate. As can be seen, the coupling between inputs A and C with the output nanomagnet is ferromagnetically and the coupling of input B and the output nanomagnet is antiferromagnetically. Therefore, the output function will be Out = MAJ (A, B̅, C).
A majority gate is presented in [14]. In this gate, different physical configurations for the input driver nanomagnets have been applied. In [15], a majority gate using trapezoidal nanomagnets with asymmetric driver nanomagnets is presented. The physical implementation of a majority gate is also presented in [4]. Because of the different aspect ratios of input drivers, this gate cannot be used inside the larger NML circuits. In a majority gate proposed in [16], it is shown that due to the larger up and down input arm lengths than the middle one, the effects of the inputs reach at different times to the central nanomaterial (computational nanomagnet). In this paper, reducing the length of upper and lower input arms by decreasing the number of their nanomagnets is proposed as a solution. In this case, the simulation results indicate that there are errors in the output status for some of the input logic combinations. The use of misaligned nanomagnets in the up and low input arms has been studied as another solution, and it has been shown that this design is not working properly due to the lack of space for the use of stabilizer nanomagnets. Eventually, a modified clock system is proposed as the final solution. Although this scheme works well, the actual implementation of such a clock system configuration is complicated from a technological point of view [16]. Also, in this gate, the intrinsic and geometrical properties of nanomagnets and clock signal characteristics have not been addressed and the accuracy at higher temperatures has not been investigated.
2.3 Clocking in NML
The magnetic field of a single nanomagnet is not large enough to determine the magnetic state of its neighbors. Also, in NML circuits, the adjacent nanomagnets affect each other, and this can cause some nanomagnets to switch early and thus cause the circuit to malfunction. Therefore, an external magnetic field is required to assist in the correct switching of nanomagnets, which is called clock. Various methods have been proposed for clocking system. One common method is to use a magnetic field generated by the electric current of wires beneath the surface of nanomagnets. The wire is made of copper, which has covered by supermalloy on three sides to enclose the field [17]. The role of the clocking system is to properly control the switching of the nanomagnets in a circuit. The three-phase clocking system is the most commonly used method to control the switching of nanomagnets in NML circuits [18,19,20]. In this system, the NML circuit is subdivided into regions containing one or more nanomagnets, and each of these areas which is called a clock zone has a different clock signal. Figure 4 shows a three-phase clocking system with two nanomagnets in each zone. In this figure, the clock signal is applied to nanomagnets along their + X axis. As shown in this figure, the clock reaches its highest level in the RESET phase and puts the nanomagnets of this zone in the null state. In the SWITCH phase, the clock reaches its zero level, and the nanomagnets in this zone switch to their new logical states due to the effects of adjacent nanomagnets which are in the HOLD state. In the HOLD state, the clock is at zero level, so the nanomagnets at this zone maintain their magnetic state.
2.4 Conservative logic
In the conservative logic first presented in [10], the number of inputs and outputs is equal. Also, the numbers of 1 s in input and output vectors are the same. Thus, conservative circuits inherently support simultaneous error detection and can be tested with only two test patterns, regardless of their function [21]. One of the most famous conservative gates is Fredkin gate [10]. We have already designed and evaluated the nanomagnetic circuit of this gate [11]. The conservative quantum-dot cellular automata (CQCA) gate introduced in 2009 is less complex than Fredkin gate; therefore, the area of circuits designed with it often is smaller [22]. Table 1 shows the truth table of CQCA gate. The implementations of this gate are shown in Fig. 5.
As an example, to compare complexity, Fig. 6 shows a conservative full-adder, which is the basic block for computational circuits, using only two CQCA gates. This circuit adds A, B and C as input bits and outputs a sum bit and a carry bit. To the best of our knowledge, four Fredkin gates are required to design a conservative full-adder circuit [23].
2.5 The proposed clock structure
One of the most major challenges of NML circuits is the design of the clocking system. Proper choices of magnitude, period, overlapping of different phases, rise and fall times of clocks have a great impact on the accuracy of the circuit, dynamic power reduction and the speed of NML circuits. In Fig. 7, we show the proposed clock scheme for an inverter chain consisting of six nanomagnets. The design uses the three-phase overlapping clocks with nonzero rise and fall times. Overlapping clocks reduce the magnitude needed to RESET the nanomagnets in a clock zone. It also increases the reliability of unidirectional data propagation as well as circuit speed. We use two nanomagnets in each clock zone. Increasing the number of nanomagnets in a zone increases the probability of random and early switching of nanomagnets due to the thermal fluctuations and magnetic fields from neighboring nanomagnets, and consequently, decreases circuit reliability. In addition, as the number of nanomagnets in each zone increases, the time required to switch all the nanomagnets in a zone increases, and as a result, the clock frequency decreases. To improve the reliability of the circuit, the rise and fall times of the clock signal must be nonzero. Furthermore, since a clock zone contains several nanomagnets, the clock period must be sufficient to allow enough time for these nanomagnets to switch properly. Reducing these times can cause some nanomagnets to switch incorrectly. On the other hand, an excessive increase in these times reduces the clock frequency as well as circuit speed.
2.6 The proposed structure for nanomagnetic three input majority gate
According to Fig. 5, the output functions of CQCA gate are expressed in two ways. If we use non-majority based AND/OR gates [24] to implement the nanomagnetic CQCA (similar to what we have done for the NML Fredkin gate [11]), the logic depth and the number of nanomagnets, as well as circuit area increase due to the use of three input OR gates, and consequently, the circuit speed decreases. To the best of our knowledge, no complete micromagnetic simulations for general clocked in-plane nanomagnetic logic majority gate has yet been presented in the literature. In fact, as discussed in Sect. 2.2, the shorter input arm of the gate causes an early switching in the computational nanomagnet state and causes to malfunction for some logic input combinations. In this paper, we have eliminated this problem by modifying the material and geometrical dimensions of nanomagnets and using three-phase clocking system. The nanomagnetic structure of the proposed majority gate is shown in Fig. 8 (the red nanomagnets). According to this figure, we have chosen the aspect ratio of computational nanomagnet smaller than that of the input nanomagnets. In this case, when the clock switches from RESET to SWITCH, the computational nanomagnet enters the switch mode later than the input nanomagnets. The value of aspect ratio must be such that before the middle input nanomagnet can change the status of the computational nanomagnet, there should be enough time for arriving effects of the upper and lower inputs to this nanomagnet. According to our simulations performed for different aspect ratios, the appropriate ratios for computational nanomagnet and input nanomagnets are 1.5 and 2, respectively. In this case, the majority gate works correctly for all input combinations. Based on our simulations, the difference between coercivities for two rounded nanomagnets with sizes 45 * 90 * 20 nm3 and 45 * 70 * 20 nm3 is about 70 mT, which guarantees accurate and unidirectional data propagation.
In addition, we have used biaxial anisotropy [25] instead of uniaxial anisotropy, to increases the stability of nanomagnets in their hard-axis and also against thermal oscillations and magnetic fields of adjacent nanomagnets. The biaxial anisotropy also reduces the clock magnitude needed to keep the nanomagnets in their null state. Since the hard-axis stability of the ferromagnetically arranged nanomagnets is much less than that of other nanomagnets, the horizontal rectangular stabilizer nanomagnets are used to increase their hard-axis stability [26]. Based on the OOMMF simulations, the geometrical shape and dimensions of these nanomagnets have been determined so that their magnetization fields can keep the vertical nanomagnets in the null state until the signal arrives from adjacent nanomagnets.
2.7 The proposed NCQCA structure
The proposed structure of the NCQCA gate is shown in Fig. 8. In this figure, red color is used to display the three-input majority gates. Black, yellow, and gray colors represent input, stabilizer and AF ordered nanomagnets, respectively. Additionally, the inputs are duplicated and applied at multiple positions with the aim of avoiding wire crossings.
In order to improve the reliability of this circuit against thermal fluctuations, we have extended the aspect ratio of the left-hand side nanomagnets in each clock zone. In this case, when the clock signal is applied to the X-axis of the nanomagnets in a clock zone, the smaller nanomagnet moves to the null state a little earlier than the larger one. Obviously, the magnitude of the clock signal should be large enough to force both nanomagnets in their null state.
Thermal noise applies random small fluctuations to nanomagnets. However, as nanomagnets in null state are highly unstable, these small fluctuations can change their state randomly and prematurely. The difference in the aspect ratio of the nanomagnets in a clock zone causes the larger nanomagnet to switch earlier than the smaller one when the clock signal goes from RESET to SWITCH; therefore, the data propagate in the correct order.
3 Simulation results and comparisons
The OOMMF tool, produced by NIST [27], is used to simulate the proposed majority and NCQCA gates. This tool solves Landau–Lifshitz–Gilbert (LLG) equation, which describes how the magnetization evolves with time [28, 29]. It is important to choose the proper aspect ratio of nanomagnets. Too much increase of this ratio leads nanomagnets to the unstable null state and consequently causes the circuit to malfunction. Also, if this ratio is too small, it will cause incorrect data propagation due to the high stability of the nanomagnets along their hard axis. We have performed multiple simulations to obtain the appropriate aspect ratio of nanomagnets. In the proposed NML circuits, the dimensions of the large and small nanomagnets are 45 * 90 * 20 nm3 and 45 * 70 * 20 nm3, respectively. The horizontal distance of the nanomagnets is 20 nm and their vertical distances are 25 and 30 nm and the dimensions of all stabilizer nanomagnets are 65 * 40 * 20 nm3. The material of all nanomagnets is cobalt with biaxial anisotropy. In all simulations, the saturation magnetization of 1 * 106 A/m, the anisotropy constant of 5 * 104 J/m3, the exchange stiffness of 1.3 × 10−11 J/m and the damping coefficient of 0.1 are chosen. Clock parameters are similar to [11] except that for correct switching, the fall and rise times must be at least 2 ns. In this case, the clock frequency will be 55 MHz. The required clock magnitude for our proposed NML structures is 170mT and the selected stage time for OOMMF tool is 0.1. The simulation results for NCQCA gate outputs for all logic combinations are shown in Figs. 9 and 10. These results indicate the correct operation of this circuit. As shown in Fig. 8, the NCQCA output nanomagnets are located in the clock zone 2. Therefore, the outputs are valid at the end of the switching phase of clock zone 2 (at 12 ns).
The reliability of the proposed NCQCA gate at room temperature is also studied and evaluated. We utilized Theta Evolve extension [30] and performed ten different simulations with different seeds to investigate the effect of thermal fluctuations on the proposed gate. The results show the high reliability of this gate at room temperature. Figure 11 shows the simulation results for the critical input pattern, i.e. ABC = 010, at room temperature.
Table 2 shows the comparison between our nanomagnetic conservative gate (NCQCA) and the only published nanomagnetic conservative gate (i.e. NML Fredkin). The results show that although the NML Fredkin gate is commonly used as the conservative gate for the construction of conservative circuits, the number of nanomagnets and area are, respectively, about 44% and 90% higher than the proposed NCQCA gate. Also, because the NCQCA gate outputs are valid after the switching phase of clock zone 2 (instead of clock zone3 in NML Fredkin gate), it is approximately 34% faster than the Fredkin gate.
4 Conclusion
In this paper, the nanomagnetic conservative quantum-dot cellular automata (NCQCA) gate, as the building block for nanomagnetic testable conservative circuits, has been proposed. The general nanomagnetic clocked majority gate, as a basic block of NCQCA, has been provided to reduce the complexity and delay of this gate. Various parameters of nanomagnets such as shape, dimensions, inter-distances, materials, anisotropy, and the clocking system have been taken into account using the OOMMF simulation tool. The simulation results reveal a significant improvement in the speed and area of the proposed NCQCA gate compared to the only published nanomagnetic logic conservative Fredkin gate. Therefore, the NCQCA gate can reduce the area and delay of more complex conservative circuits such as nanomagnetic conservative computational circuits. The reliability of the NCQCA gate at room temperature has also been evaluated.
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Dadjouyan, A.A., Sayedsalehi, S., Faghih Mirzaee, R. et al. Design and simulation of reliable and fast nanomagnetic conservative quantum-dot cellular automata (NCQCA) gate. J Comput Electron 20, 1992–2000 (2021). https://doi.org/10.1007/s10825-021-01763-y
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DOI: https://doi.org/10.1007/s10825-021-01763-y