1 Introduction

Because of properties such as carrier mobility and direct bandgap, the group III–V binary compounds are used in a variety of optoelectronic and nanoelectronic applications [1,2,3]. These compounds consist of elements listed in groups III and V of the periodic table. The III–V binary compounds are expressed as XY, where X is group III elements (Al, B, Ga, In) in the periodic table and Y is group V elements (N, P, As, Sb) in the periodic table. The III-nitride is formed by the combination of nitrite from group V elements and at least one element from group III elements. These compounds are particularly useful in optoelectronic device technology, such as light-emitting diodes (LEDs), because they have a wide bandgap that spans the visible and ultraviolet spectrums [4, 5]. For example; Wu and co-workers [4] stated that Aluminium nitride (AlN) may be a promising compound for low-cost and high-quality LEDs. These materials can be used as absorber layers to optimize efficiency in solar cells [5].

AlN, an III-nitride group member, has piezoelectric properties, extreme electrical behavior, and high thermal conductivity (Ҡ = 285 W (m K)−1) [6,7,8,9,10]. It also has a wurtzite crystal structure and a wide bandgap (6.2 eV) at room temperature, which is one of the largest bandgap semiconductor materials [11]. Devices with such a wide bandgap interface have the advantage of being chemically and thermally stable, as well as being able to operate in harsh physical environments. Due to its promising properties, AlN has an important place in technology applications. AlN has been widely used in various electronic and photonic devices with the contribution of its optical properties as well as piezoelectric properties. In the past few years, studies have been carried out to explore the potential of AlN [12,13,14,15]. For example, Esteves et al. [15] showed that AlN can be used in elevated temperature micro-scale devices. Taniyasu et al. [16] demonstrated the development of the AlN PIN (p-type/intrinsic/n-type) homojunction LED with an emission wavelength of 210 nm [16]. With the revelation of the above-mentioned features, some researchers were fabricated Al/AlN/p-Si MIS structures [17,18,19,20]. Kong et al. [18] shown a good charge holding effect with long-term charge keeping at ± 3 V, in their study of the charge storage properties of Al/AlN/p-Si metal–insulator-semiconductor (MIS). Also, they [18] stated that with this charge storage behavior, the MIS structure can be promising in improving performance in optoelectronics and memories applications. Altuntaş et al. [20] studied the electric-field-dependent current transport mechanisms of Al/AlN/p-Si MIS, and showed that the MIS structure has five current conduction mechanisms, which are ohmic conduction, Schottky emission, Frenkel–Poole emission, trap assisted tunneling, and Fowler–Nordheim tunneling. In addition, Altuntaş et al. [20] stated that this MIS structure can be a potential for various electronic applications thanks to its different physical properties. The main subject of analyses in these studies is that Al/AlN/p-Si structures can be used in various device technologies, such as optoelectronic or electronic devices.

Studies and knowledge on the electrical properties of AlN/Si-based devices are limited to an only condition environment. That is, studies on these electrical properties suffer from knowledge and behavior in various physical conditions. In this letter, the electrical properties of the Al/AlN/p-Si diode prepared with the help of thermal evaporation were investigated under various physical conditions, which are temperature (60–320 K), illumination (0–100 mW∙cm−2), and frequency (5–5 MHz). In this way, the use of AlN in various electronic and optoelectronic applications was investigated. Additionally, the AlN interface is examined for the effect on basic diode parameters such as ideality factor (n), zero-bias barrier height (ΦB0), and series resistance (Rs) and is to be compared with the literature. Temperature-dependent electrical properties were examined separately using Thermionic Emission (TE) theory, Norde Function (NF), and Cheung&Cheung Functions (CCF) and compared with each other.

2 Experimental procedures

The thermal evaporation system gave schematic representation in Fig. 1a was used at all stages of the structure’s fabrication. First, a p-type silicon wafer with a 525 μm thickness and 1–10 Ω.cm properties purchased from Sigma-Aldrich Company was cut at 1 × 1 cm square and chemically cleaned using standard RCA1 and RCA2 processes. Then, cleaned p-Si was transferred to the thermal evaporation system. Here, 1 mg of Al wire (diameter 1.0 mm, 99.999%) was evaporated on the unpolished surface of p-Si at about 1.3 × 10–3 Pa in the thermal evaporation system. Single surface coated p-Si was annealed at 450 °C for 5 min in the dry N2 atmosphere to obtain low-resistance contact. The AlN in powder form, which was used as the interface layer, was commercially purchased from Sigma Aldrich Company. AlN (1 mg) was evaporated with the thermal evaporation system at about 1.3 × 10–3 Pa. The thickness of the AlN interfacial layer is estimated to be about 106 nm from the oxide capacitance measurement in the strong accumulation region at a high frequency (= 1 MHz) [21]. Finally, to obtain a rectifier contact, commonly known as a Schottky contact, a circular mask was used. The 1 mg of Al wire (diameter 1.0 mm, 99.999%) was evaporated at about 1.3 × 10–3 Pa in thermal evaporation on the interfacial coated surface of p-Si. The thickness of the Al rectifier contact was obtained as 100 nm. Thus, the fabrication of the Al/AlN/p-Si was completed. The schematic and energy band diagram of the fabricated structure are given in Fig. 1b, c. The Current–Voltage–Temperature (I–V–T) measurements were performed using a Keithley 2400 Source Meter in the temperature range from 60 to 340 K. The illumination-dependent electrical measurements were carried out using a 150–300 W UV 16S-Series Solar Simulator, which can produce solar radiation in the 290–400 nm range. The Capacitance (C)–Voltage (V) and Conductance (G/w)–Voltage (V) measurements were performed using the HP 4192A LF Impedance Analyzer in the frequency range from 5 to 5000 kHz. Atomic Force Microscopy (AFM) measurements were carried out using a Park Systems XE-100E in non-contact mode and a 100 µm × 100 µm scanner.

Fig. 1
figure 1

The schematic representation of a AlN evaporation in a thermal system, b the schematic diagram, and c the energy band diagram of the fabricated structure, where Φm is the work function of Al, Φs is the work function of Si, and Φs is the electron affinity of Si

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3 Experimental results and discussion

3.1 Morphology properties

Atomic Force Microscopy (AFM) roughness measurements give information about surface roughness. AFM images of the interfacial layer at 40 × 40 μm2 square are given in Fig. 2. It was observed that the surface morphology of the AlN interfacial layer is homogeneous. Due to the interface coating method used, it is coated so homogeneously. The root mean square (RMS) value was obtained as 4 nm. This value is quite low and is suitable for thin-film studies [22]. Additionally, the obtained value shows that the material surface is of good quality and thermal evaporation is an important method for homogeneous interfacial coating [23].

Fig. 2
figure 2

Three-dimensional AFM images of the interfacial layer at 40 × 40 μm2 square

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3.2 The temperature-dependent electrical properties

The temperature-dependent electrical properties of the structure were performed in the temperature range of 60–340 K with an increment of 20 K. Figure 3 shows the I–V–T plot of the diode. As can be seen from this figure, the current decreases with decreasing temperature both in reverse (V < 0) and forward (V > 0) bias. Such behavior of the current can be attributed to generation-recombination and interfacial layer, which is AlN between metal (Al) and semiconductor (p-Si). Additionally, the regular increase in the current value with the increasing temperature shows that the fabricated structure is very sensitive to the temperature. As shown in Fig. 3, the structure has a relatively high leakage current for all temperatures. When metal and semiconductor are contacted, a space charge region (W) is formed near the contact of the semiconductor (see Fig. 1c) at the end of the thermal equilibrium. Since there are no free charge carriers in the region, the region is highly resistive and insulating. The presence and defects of this region limit the flow of charge carriers across the junction, which as a result causes the device's performance to degrade [21, 24, 25]. Additionally, Abdallah et al. [26] stated that the grain size should be small to contain the depletion layer, otherwise the larger leakage may be higher.

Fig. 3
figure 3

I-V plot of the fabricated structure at various temperatures

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The relationship between applied voltage and current in forward bias is defined by TE as follows [27];

$$I = \left\{ {AA^{*} T^{2} exp\left( { - \frac{q}{kT}\Phi_{B0} } \right)} \right\}\left[ {exp\left( {\frac{{q\left( {V - IR_{s} } \right)}}{nkT}} \right) - 1} \right]$$
(1)
$$\Phi_{B0} = \frac{kT}{q}\ln \left( {\frac{{AA^{*} T^{2} }}{{I_{0} }}} \right)$$
(2)
$$n = \frac{q}{kT}\left( {\frac{dV}{{d(\ln (I))}}} \right),$$
(3)

where A represents diode area and A* represents Richardson constant (= 32 A.cm−2 K−2 for p-Si). The curly bracket of Eq. 1 represents the saturation current (I0), ΦB0 is the barrier height, and n is the ideality factor. These values can be calculated from the intercept and slope of the linear part of the I-V-T plot for each temperature. The calculated n, I0, and ΦB0 values of the structure for each temperature value are given in the TE part of Table 1. As the temperature increases from 60 to 340 K, the ΦB0 value increases from 0.146 eV to 0.680 eV, whereas the n value decreases from 6.179 to 2.105. The reasons for the high n value are the interface layer, barrier height inhomogeneity, and interface recombination [28, 29]. There are studies on the high ideality factor in the literature [30,31,32,33]. For example, Arslan et al. [31] fabricated an (Au/Ni)/HfAlO3/n-Si metal–insulator-semiconductor junction and they found that the value of n for the junction varied from 22.93 at 80 K to 3.94 at 360 K. The series resistance (Rs) of a diode can be calculated using Ohm's Law (Ri = VF/IF) at a high forward bias. The Rs values at (+ 2 V) of the structure are given in the Ohm's Law part in Table 1. As can be seen from Table 1, the Rs value at 340 K is about 10 times smaller than its value at 60 K. Such Rs behavior can be explained by an increase in the number of free carriers gaining thermal energy and a decrease in the forbidden band gap of Si as temperature rises [27, 34,35,36].

Table 1 The obtained main electrical parameters for the fabricated structure at various temperatures
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The relative performance of the electrical properties with previously reported structures of the fabricated Al/AlN/p-Si structure in this study is listed in Table 2. For instance, in 2009, Chuah et al. [37] fabricated Ni/AIN/n-Si photodiode using a molecular beam epitaxy system and investigated the electrical characteristics of the fabricated photodiodes. They calculated n, I0, and ΦB0 to be 1.79, 6.88 × 10–6 A, and 0.71 eV, respectively. Compared to the n obtained by Chuah et al. [37], the n value obtained in this study is greater. This may be due to the high density of interface state, series resistance, and recombination generation.

Table 2 The relative performance of the electrical properties with previously reported structures of the fabricated Al/AlN/p-Si structure in this study
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Another method used to calculate the main diode parameters such as ΦB0 and Rs is a method developed by H. Norde [40, 41]. According to the method, barrier height and series resistance can be determined using F(V) function (Eq. (4)) and Eqs. (5–6).

$$F(V) = \frac{V}{\gamma } - \frac{kT}{q}\ln \left( {\frac{I}{{AA^{*} T^{2} }}} \right)$$
(4)
$$\varphi_{B0} = F(V_{\min } ) + \frac{{V_{\min } }}{\gamma } - \frac{kT}{q}$$
(5)
$$R_{s} = \frac{{\left( {\gamma - n} \right)kT}}{{qI_{\min } }},$$
(6)

where γ denotes the smallest integer greater than the ideality factor, F(Vmin) represents the minimum value of F(V) in the F(V)-V plot, Vmin represents the minimum value of V in the F(V)-V plot, and Imin represents the current value corresponding to Vmin. Using Eq. (5), the F(V)-V plot of the structure for each temperature was drawn and given in Fig. 4. As can be seen in the figure, the F(V)-V plot of the structure has an F(Vmin) and Vmin minimum value varying between 0.0 V and 0.3 V for each temperature. Using F(Vmin), Vmin, and Imin values and Eqs. (5–6), ΦB0, and Rs values were obtained and given in Nord’s Function part in Table 1.

Fig. 4
figure 4

F(V)-V plot of the fabricated structure at various temperatures

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Alternately, the n, ΦB0, and Rs can also be calculated using Cheung&Cheung Functions (CCF), which correspond to Eqs. (7) and (8) [42]. The n and Rs are determined using the slope and intercept values of the linear part of dV/dln(I)-I for each temperature. The ΦB0 and Rs are obtained using the slope and intercept values of the linear part of H(I)-I for each temperature. Equation (7) is known as the CCF’s 1st function, whereas Eq. (8) is known as the CCF's 2nd function.

$$\frac{dV}{{d\ln (I)}} = \frac{nkT}{q} + R_{s} I$$
(7)
$$H(I) = V - \frac{nkT}{q}\ln \left( {\frac{I}{{AA^{*} T^{2} }}} \right) = IR_{s} + n\varphi_{B0} .$$
(8)

Figure 5a, b shows dV/dln(I)-I and H(I)-I plots of the structure for each temperature, respectively. As can be seen from the figures, both plots have linear regions. Additionally, the linearity of dV/dln(I)-I and H(I)-I plots in the 60–120 K range is given in the inset of Fig. 5a, b, respectively. The n, ΦB0, and Rs values determined using the CCF’s 1st and 2nd functions for each temperature were given by the CCF part in Table 1.

Fig. 5
figure 5

a dV/dln(I)-I plot and b H(I)-I plot of the fabricated structure at various temperatures

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The temperature-dependent ΦB0 and Rs values determined using TE, Ohm’s Law, NF, and CCF's 1st and 2nd functions are given in Fig. 6a, b, respectively. As shown in Fig. 6a, the ΦB0 determined using three different methods is almost compatible with each other. The value of ΦB0 obtained by using CCF’s 2nd function is smaller than that obtained by using TE and NF. This difference is because the used methods have different I–V regions. That is, TE and NF are applied to the full forward bias region of the I–V characteristics, whereas CCF is applied to dates where the I–V characteristics start to deviate from linearity. Additionally, the ΦB0 values determined from these methods increase as temperatures increase. Such a relationship of ΦB0 to temperature can be explained by other current conduction mechanisms other than TE, such as Thermionic Field Emission (TFE) and Field Emission (FE). TFE and TE dominate at temperatures above room temperature, whereas TFE and TE dominate at temperatures below room temperature. Therefore, the obtained ΦB0 corresponds to the apparent barrier height (BH) for different temperatures and voltages, rather than the average value of BH. As shown in Fig. 6b, the Rs was determined using four different methods. The Rs values decrease as the temperature increases. The Rs values obtained by using different methods are almost compatible with each other, except for low temperatures. This small difference is attributed to the fact that each method has different regions of I-V regions and voltage dependence of BH [43].

Fig. 6
figure 6

a Temperature-dependent ΦB0 and b Rs values according to the various method

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The width of the depletion region (WD) plays a significant role in the electric performance of structures with a thin film between metal and semiconductor. The WD (= (2εsεoVd/qNA/D)1/2) is affected by the semiconductor permittivity, diffusion potential, and acceptor or donor atom concentration (NA or ND) [44, 45]. As the temperature increases, the ionic region formed at the junction of metal and semiconductor begins to neutralize, and the mobility of the carriers, which is determined by the density of NA or ND, increases [45,46,47]. Thus, the WD decreases with increasing temperature and conductivity increases. When WD is narrow, it can cause increased recombination, which negatively affects electrical performance. However, when the width of the depletion region is long, it is an advantage to the collection of photo-generated charge carriers [48].

3.3 The illumination intensities dependent on electrical properties

The illumination intensity-dependent I–V plot of the structures is given in Fig. 7. As shown in this figure, the structure reacts to light depending on various illumination intensities. Especially in the reverse bias region, it showed much more reaction than the forward bias region, and this reaction increased with the illumination intensity. The regular increase in the current value with the increasing illumination intensity shows that the fabricated structure is very sensitive to the illumination intensity. This is proof that the structure exhibits photoconductivity properties. When the structure is exposed to various illumination intensities, the concentration of majority charge carriers and the value of the current increase. Table 3 shows n, I0, ΦB0, and Rs determined by using Eqs. (1)–(3) and Ohm’s Law for the structures under various illumination intensities. As shown in Table 3, the n and I0 increase whereas ΦB0 and Rs decrease as the illumination intensity increases. The behavior of the n and ΦB0 under various illumination intensities can be explained by the generation and separation of electron–hole pairs, barrier inhomogeneity between metal and semiconductor, and the molecular restructuring and reordering of surface states [49, 50]. Moreover, the n value has a dramatically increment due to the voltage drop across the large Rs while the ΦB0 has a slight decrease due to the bandgap narrowing as increasing illumination intensity.

Fig. 7
figure 7

The illumination intensities dependent I–V plot of the structures at various illumination intensities

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Table 3 The obtained main electrical parameters for the fabricated structure at various illumination intensities
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The photocurrent–time relationship of the structure was performed at various illumination intensities and − 2 V and was given in Fig. 8. When the switch is opened, the photocurrent is suddenly increased for various illumination intensities. The current has reached its maximum value of 5.77, 6.82, 7.37, 7.74, and 7.92 mA for 30, 40, 60, 80, and 100 mW cm−2, respectively, due to the increasing free charge carriers. This behavior is an indication that the device depends on the illumination intensity.

Fig. 8
figure 8

Photocurrent-times plot of the fabricated structure at various illumination

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3.4 The frequency-dependent electrical properties

To investigate the effects of the AlN interfacial layer on electrical characteristics, capacitance–voltage (C–V) and conductance–voltage (G/w-V) measurements were performed over a wide frequency and bias voltage range. Figure 9 shows the low and high-frequency C–V and G/ω–V plots of the structure. As can be seen from these figures, the figures have inversion (− 1 ≤ V ≤ 1), depletion (1 ≤ V ≤ 4), and accumulation (4 ≤ V ≤ 6) regions just like in an MIS structure. Whereas the values of C and G/ω are almost independent of the frequency in the inversion region, their values decrease with the increase in frequency in the depletion and accumulation regions. The regular increase in the capacitance and conductance values with the decreasing frequency shows that the fabricated structure is very sensitive to the frequency.

Fig. 9
figure 9

a Low-frequency, b High-frequency C–V plots, and c Low-frequency d High-frequency G/ω-V plots of the fabricated structure at various frequencies

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According to Nicollian and Brews [21], the resistance (Ri) of a diode is given as follows;

$$R_{i} = \frac{{G_{m} }}{{G_{m}^{2} + (\omega C_{m} )^{2} }},$$
(9)

where ω is the angular frequency (= 2πf), and Cm and Gm correspond to the measured capacitance and conductance, respectively. The series resistance (Rs), which affects the electrical properties of a diode, is obtained by using values of Cm and Gm in the strong accumulation region [21]. The Ri-V plot drawn as a function of the low and high-frequency for the structure is given in Fig. 10a, b, respectively. As can be seen from these figures, the Ri value has a peak in the inversion region for each frequency. The intensity of the peak shifts to the depletion region with increasing frequency, and the intensity of the peak decreases. The peak at high frequencies has two separate maximum points, especially in the inversion region. The intensity of the first peak can be attributed to the surface polarization, whereas the intensity of the second peak can be attributed to the presence of the interfacial layer [51]. Additionally, the Ri value is almost independent of frequency due to the relaxation mechanisms between the interfacial layer and p-Si surface in the accumulation region [52]. The frequency-dependent Rs value of the structure at + 6 V is shown in Fig. 11. As can be seen from the figure, the Rs value decreases with increasing frequency.

Fig. 10
figure 10

a Low-frequency and b High-frequency Ri-V plots of the fabricated structure at the various frequency c Rs-V plot of the fabricated structure at + 6 V

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Fig. 11
figure 11

Rs-V plot of the fabricated structure at + 6 V intensities and -2 V

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4 Conclusions

We fabricated an Al/AlN/p-Si diode via thermal evaporation and analyzed the electrical performance of the structure. The AFM result shows that the interfacial layer coated via thermal evaporation is quite homogeneous. The RMS value for AlN, which is the interfacial layer, was found to be 4 nm with the help of AFM. The main electronic properties such as n, ΦB0, and Rs of the structure at different temperatures were calculated using TE, NF, and CCF and compared with each other. In addition, these main electrical parameters were also examined and analyzed based on various illumination intensities. Experimental results revealed that the main electronic parameters are very sensitively dependent on both temperature and illumination intensity. When the graphs obtained for temperature, frequency, and light intensity are examined, it is seen that various electrical characteristics such as current and capacitance change with sensitivity according to the conditions of the physical condition which shows the unique characteristics of this Al/AlN/p-Si MIS device. That is, the fabricated structure responds with high sensitivity to both temperature and illumination intensity. This proves that the fabricated structure, which has been designed and whose electrical properties have been studied, may be a candidate for sensing applications such as Schottky-type temperature or light sensors.