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Investigation of Analog Parameters and Miller Capacitance Affecting the Circuit Performance of Double Gate Tunnel Field Effect Transistors

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Intelligent Communication, Control and Devices

Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 1341))

Abstract

TCAD Simulations for 30 nm double gate tunnel field effect transistor (DGTFET) reports steeper subthreshold swing, SS ~ 15 mV/dec, ION ~ 10–4 A/µm, and low off-state current IOFF ~ 10−15A/µm as desirable parameters for low voltage applications. The unity gain frequency (fT) increases with Vgs and maximizes at 5.2 × 1011 Hz for Vgs = Vds = 0.7 V. It is investigated that the gain-bandwidth product (GBP) also increase with Vgs and maximized at 2.63 × 1011 Hz for Vds = 0.7 V at Vgs = 0.6 V. Transconductance frequency product (TFP) increases initially with Vgs (0–0.7 V) and maximizes at 4.46 × 1011 Hz/V for Vds = 0.7 V. Higher value of Vds results in better response time of the DGTFETs, i.e., increasing Vds from 0.1 to 0.8 V, the transit time (tr) of the electron decreases from 4 to 0.1 ps resulting faster switching operation. Transient performance of DGTFETs reports that at supply voltage (VDD) = 0.7 V, increasing the load capacitance (CL, 10–200 pF) the total delay increases from 0.18 to 1.9 ns. It is also noticed that the % peak voltage overshoot (% Vp) decreases from 42.8 to 2.14% due to decrease in computed values of miller capacitance (CMIL) from 11.27 to 4.32 fF. Maintaining CL = 15 fF, increasing VDD reports significant variation in voltage peak overshoot from 35 to 26.25% and total delay also decreases from 8 to 0.2 ns for VDD = 0.1–0.8 V.

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Authors and Affiliations

  1. Department of Electrical and Electronics Engineering, University of Petroleum and Energy Studies, Dehradun, 248007, Uttarakhand, India

    Deepak Kumar

  2. Department of Electrical Engineering, Indian Institute of Technology Kanpur, Kanpur, 208016, India

    Shiromani Balmukund Rahi

  3. Department of Applied Sciences, University of Petroleum and Energy Studies, 248007, Dehradun, India

    Piyush Kuchhal

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  1. Deepak Kumar
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  2. Shiromani Balmukund Rahi
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  3. Piyush Kuchhal
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Correspondence to Deepak Kumar .

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Editors and Affiliations

  1. Department of Electrical and Electronics Engineering, University of Petroleum and Energy Studies, Dehradun, Uttarakhand, India

    Sushabhan Choudhury

  2. Department of Electrical and Electronics Engineering, University of Petroleum and Energy Studies, Dehradun, Uttarakhand, India

    R. Gowri

  3. Institute for Intelligent Systems, University of Johannesburg, Johannesburg, Gauteng, South Africa

    Babu Sena Paul

  4. Department of Computer Science and Information Engineering, Asia University, Taichung, Vietnam

    Dinh-Thuan Do

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Kumar, D., Rahi, S.B., Kuchhal, P. (2021). Investigation of Analog Parameters and Miller Capacitance Affecting the Circuit Performance of Double Gate Tunnel Field Effect Transistors. In: Choudhury, S., Gowri, R., Sena Paul, B., Do, DT. (eds) Intelligent Communication, Control and Devices. Advances in Intelligent Systems and Computing, vol 1341. Springer, Singapore. https://doi.org/10.1007/978-981-16-1510-8_33

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