Keywords

46.1 Introduction

An electrical power system consists of wide range of electrical and power electronic equipment in commercial and industrial applications. The quality of the power is effected by many factors like harmonic contamination, arc in arc furnace, sag and swells due to the increment of non-linear loads such as large thyristor power converters, power electronics devices, voltage and current flickering, arc in arc furnaces and switching of loads respectively which also affects the sensitive loads to be fed from the system. In lightning strikes on transmission lines, the switching of capacitor banks and various network faults can also cause PQ problems. In order to meet PQ standard limits, it is necessary to include some sort of compensation [1]. The solutions can be found in the form of active rectification or active filtering [2]. The Shunt active power filter is suitable for the suppression of negative load influence on the supply network, supply voltage imperfections, a series active power filter may be needed to provide full compensation [38].

In all the above mentioned techniques PI controller is used for designed UPQC. In order to regulate the dc-link capacitor voltage, a conventional PI controller is used to maintain the dc-link voltage at the reference value. The conventional UPQC is also modified; with the new control techniques based on Modified Synchronous Reference Frame theory (MSRF) to overcome the power quality problems such as voltage current unbalance, harmonics, reactive power compensation, voltage sag, swell and interruptions.

46.2 Proposed System Description

46.2.1 Circuit Configuration

The MC-UPQC line diagram of a distribution system is shown in Fig. 46.1; two feeders connected to two different substations supply the loads Linear load L1, non linear load L2. The MC-UPQC is connected to two buses BUS1 and BUS2 with voltages of u t1 and u t2 and load L1 and L2 with a current of i l1 and i l2. Sending end voltages are denoted by u s1 and u s2 while load voltages are u l1 and u l2. Finally, feeder currents are denoted by i s1 and i s2. The Bus voltages u t1 and u t2 are distorted and may be subjected to sag/swell.

Fig. 46.1
figure 1

Line diagram of a distribution system with an MC-UPQC

46.3 Design of Shunt and Series VSCs

46.3.1 The Control Scheme of the Shunt VSC

When compared to conventional method [2], the designed system of shunt VSC gives the better compensating of harmonics, reactive components of feeder one load current as well as to regulate the common dc-link capacitor voltage.

The three phase load currents for feeder one is transformed into load synchronous reference currents using Eq. (46.1).

$$ \left[ {\begin{array}{*{20}c} {i_{l - d} } \\ {i_{l - q} } \\ {i_{l - 0} } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} {I_{d} } \\ {I_{q} } \\ {I_{0} } \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} {i_{l - a} } \\ {i_{l - b} } \\ {i_{l - c} } \\ \end{array} } \right] $$
(46.1)
$$ \left[ {\begin{array}{*{20}c} {I_{d} } \\ {I_{q} } \\ {I_{0} } \\ \end{array} } \right] = \frac{2}{3}\left[ {\begin{array}{*{20}c} {\sin wt} & {\sin \left( {wt - \frac{2\pi }{3}} \right)} & {\sin \left( {wt + \frac{2\pi }{3}} \right)} \\ {\cos wt} & {\cos \left( {wt - \frac{2\pi }{3}} \right)} & {\cos \left( {wt + \frac{2\pi }{3}} \right)} \\ {1/2} & {1/2} & {1/2} \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} {I_{a} } \\ {I_{b} } \\ {I_{c} } \\ \end{array} } \right] $$
(46.2)

The fundamental direct axis component current is transferred into dc quantities using 2nd order LPF and it is added to the Fuzzy output to generate a new reference shunt feeder currents in Eqs. (46.3) and (46.4).

$$ i_{f - d}^{ref} = \overline{{i_{ld} }} +\Delta I_{dc} $$
(46.3)
$$ i_{f - q}^{ref} = i_{l - q} $$
(46.4)

The direct component of the feeder current is subjected to load direct dc components and quadrature components of the feeder current is subjected to zero. The new reference shunt feeder currents in Eqs. (46.3) and (46.4) are transformed back to the abc reference currents.

$$ \left[ {\begin{array}{*{20}c} {i_{f - a}^{ref} } \\ {i_{f - b}^{ref} } \\ {i_{f - c}^{ref} } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} {I_{a} } \\ {I_{b} } \\ {I_{c} } \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} {i_{f - d}^{ref} } \\ {i_{f - q}^{ref} } \\ {i_{f - 0}^{ref} } \\ \end{array} } \right] $$
(46.5)

The shunt currents are added to the abc reference frame currents and it is sensed by the relay to control the currents.

46.3.2 The Control Scheme of the Shunt VSC

The MSRF based control algorithm for the shunt VSC block is shown in Fig. 46.2. When compared to conventional method [2], the proposed system of series VSC’s gives the better compensation of voltage sag, swell and interruptions in feeder two alone. The series VSC block is based on the unit vector template by the new MSRF theory.

Fig. 46.2
figure 2

SRF based control strategy of the shunt VSC

The three phase load voltages are transformed into load synchronous reference voltages using Eq. (46.6).

$$ \left[ {\begin{array}{*{20}c} {v_{l - d} } \\ {v_{l - q} } \\ {v_{l - 0} } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} {v_{d} } \\ {v_{q} } \\ {v_{0} } \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} {v_{l - a} } \\ {v_{l - b} } \\ {v_{l - c} } \\ \end{array} } \right] $$
(46.6)
$$ \left[ {\begin{array}{*{20}c} {v_{d} } \\ {v_{q} } \\ {v_{0} } \\ \end{array} } \right] = \frac{2}{3}\left[ {\begin{array}{*{20}c} {\sin wt} & {\sin \left( {wt - \frac{2\pi }{3}} \right)} & {\sin \left( {wt + \frac{2\pi }{3}} \right)} \\ {\cos wt} & {\cos \left( {wt - \frac{2\pi }{3}} \right)} & {\cos \left( {wt + \frac{2\pi }{3}} \right)} \\ {1/2} & {1/2} & {1/2} \\ \end{array} } \right]\left[ {\begin{array}{*{20}c} {v_{a} } \\ {v_{b} } \\ {v_{c} } \\ \end{array} } \right] $$
(46.7)

The expected load Synchronous reference dqo voltages is subtracted to the V ldqo in Eq. (46.8) and its compensation reference feeder dqo voltages is transformed back to the synchronous reference feeder voltages using Eq. (46.9).

$$ \left[ {\begin{array}{*{20}c} {v_{f - d}^{ref} } \\ {v_{f - q}^{ref} } \\ {v_{f - 0}^{ref} } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} {v_{l - d} } \\ {v_{l - q} } \\ {v_{l - 0} } \\ \end{array} } \right] - \left[ {\begin{array}{*{20}c} {v_{l - d}^{exp} } \\ {v_{l - q}^{exp} } \\ {v_{l - 0}^{exp} } \\ \end{array} } \right] $$
(46.8)
$$ \left[ {\begin{array}{*{20}c} {v_{sf - a}^{ref} } \\ {v_{sf - b}^{ref} } \\ {v_{sf - c}^{ref} } \\ \end{array} } \right] = \left[ {\begin{array}{*{20}c} {v_{d} } \\ {v_{q} } \\ {v_{0} } \\ \end{array} } \right]^{ - 1} \left[ {\begin{array}{*{20}c} {v_{f - d}^{ref} } \\ {v_{f - q}^{ref} } \\ {v_{f - 0}^{ref} } \\ \end{array} } \right] $$
(46.9)

The output of the PWM generator compensation voltage is directly given to control part of series VSC.

46.4 Simulation Block Diagrams

The series VSC simulation control block diagram is shown in Fig. 46.3. In series VSC the measured load current is transformed into the synchronous dq0 reference frame by using Eq. 46.5. The reference current in (46.9) is then transformed back into the abc reference frame.

Fig. 46.3
figure 3

Simulation control block diagram of the series VSC

46.4.1 Design of Source Controller

The new source controller is designed using normal continuous sine wave. Changing the amplitude, angular frequency, phase sequence we can get the discrete sine wave form. The below Eqs. (46.10), (46.11), (46.12) shows the source of A, B, C for sine wave form.

$$ {\text{Source A }} = \, \left[ {{\text{sw1}} + \, \left( {{\text{sw4}} \times {\text{t1}}} \right)} \right] \, \times {\text{Vp - p rms }} \times {\text{t2}} $$
(46.10)
$$ {\text{Source B }} = \, \left[ {{\text{sw3}} + \, \left( {{\text{sw6}} \times {\text{t1}}} \right)} \right] \, \times {\text{Vp - p rms }} \times {\text{t2}} $$
(46.11)
$$ {\text{Source C }} = \, \left[ {{\text{sw5}} + \, \left( {{\text{sw2}} \times {\text{t1}}} \right)} \right] \, \times {\text{Vp - p rms }} \times {\text{t2}} $$
(46.12)

Here Sw1 to Sw6 are the switches, t1 and t2 are the timer values, bias value is zero, phase degree is 120° phase shift. Using sample based sine wave type if numerical problems due to running for large time error. The simulation circuit diagram of pure sinusoidal supply voltage is shown in Fig. 46.4a and linear series transformer is shown in (b).

Fig. 46.4
figure 4

Simulation circuit diagram of a pure sinusoidal supply voltage and b linear series transformer

The load and source active and reactive powers are calculated without and with MC-UPQC is connected to system are shown in Table 46.1. The Simulation circuit diagram of Multi Converter-UPQC (MC-UPQC) is connected in a distribution system is shown in Fig. 46.5.

Table 46.1 Active and reactive power for load and source side
Fig. 46.5
figure 5

Simulation circuit diagram of MC-UPQC is connected in a distribution system

46.5 Simulation Results and Discussion

The simulation results of MC-UPQC are shown in below figures. In this section, calculating sag/swell, Harmonic for bus1, bus2, load side, source side in feeder1 and 2.

46.5.1 The Bus Voltage on Distortion and Sag/Swell

The BUS1 voltage contains 37.50 % sag between 0.1–0.2 s and swells 134 % between 0.2–0.3 s. The BUS2 voltage contains 34 % sag between 0.15–0.2 s and swells 130 % between 0.25–0.3 s.

The MC–UPQC is switched on at t = 0.02 s. The BUS1 voltage and harmonic spectrum are shown Fig. 46.6, the corresponding compensation voltage injected by VSC1 is shown in Fig. 46.7a and load L1 voltage are shown in Fig. 46.7b. The distorted voltages of BUS1 and BUS2 are satisfactorily compensated for across the loads L1 and L2 with very good dynamic response. Similarly, the BUS2 voltage are shown in Fig. 46.8, corresponding compensation voltage injected by VSC3 is shown in Fig. 46.9a and the load L2 voltage are shown in Fig. 46.9b. Feeder1 current are shown in Fig. 46.10a. The distorted nonlinear load current is compensated and the THD of the feeder current is reduced from 14.68 to 3.49 % is shown in Fig. 46.10b. THD values for without and with MC-UPQC are shown in Table 46.2.

Fig. 46.6
figure 6

Simulation results of a BUS 1 voltage in Feeder 1. b Harmonics spectrum for BUS 1 voltage

Fig. 46.7
figure 7

Simulation results of a series compensating voltage in feeder 1 and b load voltage in feeder 1

Fig. 46.8
figure 8

Simulation results of bus 2 voltage in feeder 2

Fig. 46.9
figure 9

Simulation results of a series compensating voltage in feeder 2 and b load voltage in feeder 2

Fig. 46.10
figure 10

Simulation results of a feeder 1 current and b harmonics spectrum for feeder 1 current

Table 46.2 Percentage THD values of without and with MC-UPQC

46.6 Conclusion

The design of a new source controller and Multi-Converter Unified Power Quality Conditioner (MC-UPQC) connected to 3P3 W system has been presented in this paper. By using FLC with MC-UPQC dc-link voltage controller it is observed that transient response is attained very fast. The distorted Non-linear load current is compensated very well. The harmonic components and unbalance of bus1 voltage are compensated for by injecting the proper series voltage.