Abstract
Organic materials as carrier selective layers are increasingly explored towards low temperature solution processed Silicon based heterojunction solar cells. In this regard, PEDOT:PSS (poly (3,4-ethylenedioxythiophene) polystyrene sulfonate) acts as a carrier selective layer for holes, by forming a barrier for the electrons. Accordingly, here we investigate the passivation quality of PEDOT:PSS over n-type c-Si wafer and report the initial results on such heterojunction solar cells. The fabricated Ag/PEDOT:PSS/n-c-Si/n+/Al hybrid solar cell structure yielded an efficiency of 8.79%, thus indicating the viability of PEDOT:PSS as a carrier selective hole extraction layer for Si based heterojunction solar cells.
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1 Introduction
With the increased demand of power, the main aim of the photovoltaic research and development is to increase the efficiency of the cells and decrease the cost per Watt. Conventional crystalline Silicon solar cell require high temperature thermal diffusion and metallization processes [1] and sophisticated instruments for fabrication, while organic polymer based hybrid heterojunction solar cell on Silicon can be fabricated by low temperature spin coating [2, 3]. In organic-Silicon heterojunction solar cell, PEDOT:PSS acts as hole selective contact while Silicon is used as the absorbing material, and therefore has the potential to show efficiency close to that achieved by conventional crystalline silicon solar cells.
2 Experimental
The passivation quality of PEDOT:PSS on silicon wafer has been studied by studying the minority carrier lifetime using QSSPC (Quasi steady state Photo-conductance) measurements using Sinton WCT-120 Photo-conductance lifetime tester. Figure 65.1 shows the schematic structure for measuring the effective lifetime. PEDOT:PSS is spin coated on both the sides of the Silicon to passivate both the sides of the wafer. PEDOT:PSS/n-Si hybrid heterojunction devices were fabricated using the low temperature spin coating of PEDOT:PSS over the 1–5 Ω cm n-type CZ Silicon substrate at a rate of 1000 rpm for 50 s. After this spin coating, the samples were annealed at 140 °C in nitrogen for 15 min. In the case of solar cells structure, the PEDOT:PSS was coated over n-type c-Si wafers with n+ thermal diffusion on the rear side of the wafer which act as the back surface field. Electrical contacts to the device to extract the carriers were made using e-beam evaporation of Silver grid on the front side using a shadow mask and rear side n+ was covered with Aluminum. The structure of the fabricated device is shown in Fig. 65.2. The dark and lighted current-voltage (J-V) measurements were done using the Sun 3000 solar simulator, ABETT Technologies.
3 Results and Discussion
The effective lifetime of a sample is given by
where \( {\uptau}_{\text{eff}} \) is the effective lifetime, \( {\uptau}_{\text{bulk}} \) is the bulk lifetime of the Silicon, \( {\text{S}}_{\text{front}} \) and \( {\text{S}}_{\text{back}} \) are the front and back surface recombination velocities and W is the width of the wafer. For high quality wafer the first term on the right side is negligible and effective lifetime is a function of front and back surface recombination velocities. We have obtained an effective lifetime of 205 µs, which shows that the Silicon passivation by PEDOT:PSS is reasonably good and can be useful for solar cell applications. Dark J-V characteristic of the device is presented in Fig. 65.3. The extracted values of the dark saturation current density and ideality factor are 4.9 × 10−7 A/cm2 and 2.47 respectively. The high ideality factor signifies that the recombination generation current dominated in the device. It may be due to back contact is having high defect density because of n+ diffusion and non ohmic Al back contact. Improvement may also be needed in making better contact between PEDOT:PSS and Silicon. Figure 65.4 shows the C-V characteristics of the cell. The extracted built in voltage of the device from the C-V curve is 560 mV. The lighted J-V characteristic of the solar cell is shown in Fig. 65.5. An open circuit voltage of 537 mV, short circuit current density of 26.6 mA/cm2 and a Fill Factor value of 61.6% have been achieved with non-textured substrate resulting in an efficiency of 8.8%. The low fill factor of the device may be because of the high series resistance of the solar cell as can be seen by slope near the open circuit voltage. The non-optimized grid pattern also has contributed to this increase in series resistance.
4 Conclusion
We have demonstrated n-Si/PEDOT:PSS solar cell with open circuit voltage of 537 mV, short circuit current density of 26.6 mA/cm2, and a fill factor of 61.6% with an efficiency of 8.8%. Improvement in the device is needed in terms of the passivation quality and reduction of the series resistance to further increase the performance of the device.
References
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Acknowledgements
We would like to thank MNRE, Government of India for the financial support through the project AMANSI under the National Solar Science fellowship. Anil Kumar would like to thank UGC for providing Junior Research fellowship. We would also like to thank NCPRE and CEN at Indian Institute of Technology Bombay for the facilities provided.
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Kumar, A., Markose, K.K., Khorakiwala, I.M., Singha, B., Nair, P.R., Antony, A. (2019). Studies on the PEDOT:PSS/n-Si Hybrid Heterojunction Diode. In: Sharma, R., Rawal, D. (eds) The Physics of Semiconductor Devices. IWPSD 2017. Springer Proceedings in Physics, vol 215. Springer, Cham. https://doi.org/10.1007/978-3-319-97604-4_65
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DOI: https://doi.org/10.1007/978-3-319-97604-4_65
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