Development and Simulation of Silicon PAD

Abstract

Silicon detectors are widely used in high energy experiments. These detectors have an edge over alternative materials being explored as it has the backing of the semiconductor industry for consumer electronics. We present a brief introduction to the development of 1 cm $\times$ 1 cm Silicon PAD Detector at IIT Bombay. The reverse leakage current of the detector developed is high $\sim$mA. To understand the cause of this high current, TCAD simulation with SILVACO have been carried out to optimize the device structure. We present TCAD simulation of the detector using different pitch to see the behaviour of electric field and to improve the performance of the detector.

219.1 Introduction

Silicon detector is a large surface diode with guard rings. The steps below briefly describes the techniques we have used in silicon detector fabrication [1].

• 1. Thermal Oxidation: The silicon wafer is first cleaned using RCA process and then oxidised by heating the wafer in oxygen environment at a temperature of $\sim$1000 $^{\circ }$C.

• 2. Photolithography: We used photolithography to transfer the pattern(designed by software) from photomask to silicon wafer. Pattering of SiO$_2$ was done using double sided mask aligner.

• 3. Doping: Ion implantation technique was used to create the p-n junction.

• 4. Metallisation: Metallisation was done with Aluminium to create contacts and then patterning of Al was done using photolithography.

Fig. 219.1

a Schematic view of the detector geometry as simulated in SILVACO, b 1 cm $\times$ 1 cm Silicon pad developed at IIT Bombay. c Doping, Potential and d Electric field distribution

Fig. 219.2

a I-V characteristics of silicon pad detectors with decreasing pitch. and b Electric field distribution across the surface at the active-edge to the p+ implantation

219.2 Simulation Results

In this section we present the results of TCAD simulation. Figure 219.1a shows schematic view of the detector simulated in SILVACO. We first carried out the simulation of detector developed at IIT Bombay as shown in Fig. 219.1b, where b $=$ 200 $\upmu$m, c $=$ 80 $\upmu$m, d $=$ 45 $\upmu$m. Figure 219.1c shows the doping profile and potential distribution of the detector simulated. Figure 219.1b shows the distribution of electric field which is very high at the edge of junction. However, it should be uniformly distributed over the guard rings.

To understand the effect of guard rings, we simulated three more geometries. For simplicity, we kept b $=$ d, c $=$ 80 $\upmu$m and performed simulations for b $=$ 20 $\upmu$m, 30 $\upmu$m and 40 $\upmu$m and found out that, for 20 $\upmu$m the electric field distribution is uniform shown in Fig. 219.2b and break down voltage is also high which can be seen in I-V characteristic of detector simulated shown in Fig. 219.2a. But practically, it would be difficult to fabricate 20 $\upmu$m pitch detector.