Abstract
Multiple integrated power regulators with compact size, process extensibility, and low voltage supply are required for an energy efficient system on chip (SoC). Traditional analog low-dropout regulators (ALDOs) may barely achieve all these necessities when digital LDOs (DLDOs) are suitable solutions. The power-speed trade-off, however, limits the naturally slow transient response of the typical DLDO with synchronous control DLDOs, and fully turned-on power switches may lead to power supply ripples, resulting in poor power supply rejection (PSR). In this paper, a comparative study between ALDOs and DLDOs is presented. We first generally weigh the advantages and disadvantages of ALDOs and DLDOs. The latest DLDO strategies for quick transient response and PSR improvement are briefly discussed next. Finally, we discuss current design trends and potential DLO developments.
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El Mouzouade, S., El Khadiri, K., Qjidaa, H., Jamil, M.O., Tahiri, A. (2023). Digital vs Analog Low Dropout Regulators a Comparative Study. In: Motahhir, S., Bossoufi, B. (eds) Digital Technologies and Applications. ICDTA 2023. Lecture Notes in Networks and Systems, vol 669. Springer, Cham. https://doi.org/10.1007/978-3-031-29860-8_77
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