Remeasurement Dispatching Rule for Semiconductor EDS Process

Abstract

Recently, the Fourth Industrial Revolution has rapidly accelerated with the development of IT technology. Demand for state-of-the-art semiconductors sharply increased due to these market changes, and improvement of production capacity is particularly important to gain a competitive advantage. The semiconductor manufacturing process can be divided into three stages such as fabrication, probe (EDS), packaging. Electrical die sort (EDS) process is an important testing process in quality control between fabrication and assembly processes and is the point where the manufacturing capacity and supply chain can be affected. For these reasons, the demand for optimal operation is continuously increasing. However, schedule changes occur due to unexpected abnormal situations, such as machine failures or repairs owing to the nature of the testing process, that require retests to accurately analyze defects in products, or problems in the testing process. Therefore, scheduling considering uncertainty is especially important for smooth production. This study investigated the problem of schedule changes that arise due to retests among abnormal situations in the EDS process of non-memory semiconductors and presents a genetic algorithm with penalty method (GAPM) for scheduling under such uncertainties. The EDS process has the characteristics of a flexible manufacturing system (FMS), and it can be scheduled using the solution to the flexible job-shop scheduling problem (FJSP). Since the FJSP is an NP-hard class problem among combinatorial problems, a meta-heuristic method that can find the optimal solution in a short time is used. GAPM uses a genetic algorithm as the exhaustive search algorithm that is widely used as FJSP solutions and uses neighborhood search techniques for local search. In addition, the penalty method was used to make effective scheduling possible even under uncertainties such as retests that occur during the manufacturing process.